Current Research

Artificial intelligence, neural network, data science,VLSI,Image processing

Awards

Excellent Paper Award - Efficient Implementation and performance    

analysis of pipelined architecture for radix-4 CORDIC with

redundant arithmetic. - IRAJ held at Pune - 20^th July 2014.

Grants Received Research/Projects Guided (Beyond Academic)

1.      STTP – AICTE sponsored STTP on Awareness of Intellectual Property for Engineers and Industrialists. 2020. Conducted in three phases.-  RECEIVED GRANT OF 2.98,000 from AICTE,NewDelhi.

International Journals:

No. of International Journals Publications:10

·         1.J.M. Rudagi, Dr.S. Subbaraman, “A Design and Implementation of Dynamic CORDIC Processor,” International Journal of Computer Science & Communication,
Vol. 1, No-2, JUL-DEC-2010 [ISSN-0973-7391].

·         2.J.M. Rudagi, ,Dr.S. Subbaraman, “Performance analysis of Radix-4 CORDIC Processor in Rotation Mode with Parallel Scale Factor Computation,” International Journal of  Engineering, Technology &Advanced Engineering, Vol. 2, issue 7, July 2012 [ISSN-2250-2459].

·          3.J.M.Rudagi, Dr. S. Subbaraman, “FPGA Design, Implementation and Analysis of Trigonometric Generators using radix 4 CORDIC Algorithm”, International Journal of Microcircuits and Electronic, Vol. 4, No.1. © International Research Publication House [ISSN 0974-2204],2013.

·        4. J.M. Rudagi , Dr.S .Subbaraman, “Performance Analysis and FPGA Implementation of Radix 2 and Radix 4 CORDIC,”  International Journal of Engineering ,Science and Innovation Technology, ISSN No : 2319-5967(ISO: 9001:2008 Certified), Vol 3,Issue-4, July 2014.

·       5.  J.M. Rudagi,“Boosting the Speed of Booth Multiplier using Vedic Mathematics,” IOSR Journal of Electronics and Communication  Engineering ,Vol 11, issue 1 , Jan-Feb,2016.

·       6.  J.M. Rudagi,“ Efficient Implementation of Performance Analysis of Pipelined Architecture for Radix 4 Redundant Arithmetic,” International Conference on Recent Advances in Science ,Engineering and Technology,  Pune 20^th July,2014.

·         7.J.M.Rudagi, Dr.S.Subbaraman,“ Low Power ,High Speed DCT/IDCT using Radix 2 CORDIC Processor,” International Journal of Advanced Research ,Engineering  and Technology, vol iv,July 2016.

·        8.  J.M.Rudagi, Dr.S.Subbaraman,“ High Speed Radix 8 CORDIC Processor,” Asian Journal of Convergence Technology,” Volume III, Issue III , ISSN No: 2350-1146,I.F -2.71,2017.

·         9. Dr.J.M.Rudagi, Anita Patil ,“ A Case study on Assessment and Attainment of Course Outcomes and Program Specific Outcomes for tier-II Institutions,” IOSR Journal of Research and Method in Education e-ISSN: 2320-1959, p-ISSN: 2320-1940,Vol 9,Issue 4 Ser III( Jul-Aug 2019),pp60-66.

 10. Dr.J.M.Rudagi, “ Development of Algorithm for Offline Signature Verification using Fusion Extraction Techniques”, Scopus Indexed, Seybold Report, Vol 15-Issue 9-2020. ISSN:1553-9211

No National Journals Found.

International Conferences:

No. of International Journals Conferences:12

·         J.M. Rudagi, Dr.S. Subbaraman, “A Review of Low Power CORDIC Processor,” in IEEE Sponsored International Conference on Recent Applications of Soft Computing in Engineering & Technology, RASIET -07, organized by Institute of Engineering & Technology, Alwar on 22^nd& 23^rd Dec -07.

·         J.M. Rudagi, Dr.S. Subbaraman, “Design & FPGA implementation of High Performance Rotation Architectures, based on Radix 4 CORDIC Algorithm,” International Conference on Control, Signal & Power Engineering, Chennai, India  3^rd& 4^th Dec 2012.(ELSVEER)

·         J.M.Rudagi, et.al, “An Efficient 64 Point Pipelined FFT Engine,” 2^nd International Conference on Advances in Recent Technology in Communication & Computing, Kottayam, Kerala, India 15^th& 16^th OCT 2010.

·         J.M.Rudagi et.al ,“Efficient Implementation and Performance Analysis of Pipelined Architecture for radix-4 CORDIC With Redundant Arithmetic,”Proceedings of 13th IRF International Conference 20th July,Pune, ISBN 978-93-84209-37-7,2014.

·         J.M.Rudagi ,“Comparative Analysis of 6 bit flash ADC and 2 step flash ADC Using 180 nm CMOS Technology,” IEEE Sponsored 3 ^rdInternational conf. Electronics and Communication System, 25-26^th Feb, 2016, Karpagam College of Engineering Coimbatore ,Tamilnadu, India.

·         J.M.Rudagi,“ Performance Analysis of Different Adders using FPGA,” International Conference On Electrical, Electronics and Communication Engineering, 26^th  June  2016, Hyderabad.

·         J.M.Rudagi, Dr.S.Subbaraman ,“ FPGA Implementations of Redundant CORDIC Processor,” International Journal on Emerging Technologies, ( Special Issue on ICRIET-2016) 7(2):1-4 2016

P-ISSN:0975-2364, Online :2249-3255.

·         Jayashri Rudagi, “Hardware Implementation of Discrete / Inverse Discrete Cosine Transform using Redundant Number System CORDIC Processors.,” Journal of VLSI Design Tools and Technology, vol 11, issue 1,2021, ISSN 2321-6492 ( Print).35-42p.

·         Dr. Jayashri Rudagi, “Project Work for Technical Students and Teachers”, Journal of Huazhong University of Science and Technology, vol 50, issue-4, ISSN -1651-4512.2021.

·         Jayashri Rudagi,” Plant Leaf Disease Detection using Computer Vision and Machine Learning Algorithms,” Global Transition Proceedings, 1-6- , 2022.

No National Conferences Found.

Workshop / Seminars

No Workshop/Seminar Details Found.

Projects and Exhibitions

No Projects and Exhibitions Details Found.

Other Activities

Reviewer:

Ø  IEEE BangaloreHumanitarian Technology Conference 2020, held virtually during October 8-10,2020.

Ø  IEEE International Conference on Distributed Computing and Electrical Circuits and Electronics. (ICDCECE-2022).BellaryInstitute of Technology and Management, Bellary. On 23^rd -24^th April 2022.

Ø  IEEE International Conference on Distributed Computing, MalnadCollege of Engineering, Hassan.

2022.